This logic probe source its power from the circuit being probed (as most logic probes do). Input voltage must be between 3.3V and 15V. A 3.3V power rail is derived using a Zener diode to ensure a steady voltage to the LEDs and to provide a source for the TTL reference voltage.
The network resistor (R1-R6) can be replaced by a single 75 or 82 ohms resistor capable is disspating 3W.
The maximum current drawn from the probed circuit should be less that 400mA.
This probe measures TTL and CMOS logic levels, selected by SW2.
In TTL mode, all voltages below 0.809V (inclusive) are considered a logic 0 and anthing above 2.043V (inclusive) is considered a logic 1. These are theoritical values and depends the resistor tolerances.
In CMOS mode, all voltages that less than 30.53% of VCC are a logic 0 and anything above 69.47% is considered a logic 1. Again, resistor tolerances may impact theses theoritical numbers.
- Test points (TP1-TP6) can be ommitted. They are mainly used for analysis/debugging purposes.
- SW1 can be by-passed by shorting pin 1 and 2 together. This switch is used to "manually" read the logic levels (i.e. no read will occur until the switch is pressed).
The PCB provided is for Hammond Manufacturing 1593D box (http://www.hammondmfg.com/pdf/1593D.pdf).
At the time of this writing, this circuit has not been fully tested. Particularly, I'm wondering about the use of an hysteris resistor for the OpAmps. Any suggestions, comments, constructives critisims are very welcome.